Xiaoxuan Yang Assistant Professor Charles L. Brown Department of Electrical and Computer Engineering University of Virginia Email: xiaoxuan@virginia.edu Address: Thorton Hall E212, 351 McCormick Rd, Charlottesville, VA Google Scholar UVA Profile Curriculum Vitae

Biography

Xiaoxuan Yang is an Assistant Professor in the Electrical and Computer Engineering Department at the University of Virginia. She was a Postdoctoral Scholar in the Robust Systems Group at Stanford University, hosted by Dr. Subhasish Mitra. She received her Ph.D. degree in Electrical and Computer Engineering at Duke University under the supervision of Dr. Hai Helen Li and Dr. Yiran Chen. She received the B.S. degree in Electrical Engineering from Tsinghua University and the M.S. degree in Electrical Engineering from the University of California, Los Angeles (UCLA). Her research interests include efficient and reliable processing-in-memory-based system design, biologically plausible system design, and hardware accelerators for emerging technologies and applications.
Xiaoxuan's research work won Third Place of ACM Student Research Competition SRC at ICCAD and Best Research Award at ACM SIGDA Ph.D. Forum at DAC. She was recognized as a Rising Star in EECS, an NSF iREDEFINE Fellow, a Machine Learning and Systems Rising Star, and a Rising Scholars Postdoc Fellow. Her research group's work has received the Best Paper Award at GLSVLSI 2025.

Highlights

• Norm-Q: Effective Compression Method for Hidden Markov Models in Neuro-Symbolic Applications.

• Titanus: Enabling KV Cache Pruning and Quantization On-the-Fly for LLM Acceleration.

• Exploring and Optimizing System Performance in Compact Processing-in-Memory-based Chips.

• ESSENCE: Exploiting Structured Stochastic Gradient Pruning for Endurance-aware ReRAM-based In-Memory Training Systems.
  

• HERO: Hessian-Enhanced Robust Optimization for Unifying and Improving Generalization and Quantization Performance.

• Multi-Objective Optimization of ReRAM Crossbars for Robust DNN Inferencing under Stochastic Noise.

• ReTransformer: ReRAM-based Processing-In-Memory Architecture for Transformer Acceleration.

Simulation Frameworks

• Processing-in-Memory Design: Performance and Data Movement in Compact PIM Design [Code], KV Cache Quantization and Pruning [Code].

• Compression: Norm-Q Quantization for Hidden Markov Model in Neuro-Symbolic Application [Code], Hessian-Enhanced Robust Optimization [Code].

• Noise-aware Training: Photonic Generative Model [Code].